Intel: An update on SGX 3rd Party Attestation

https://software.intel.com/en-us/blogs/2018/12/09/an-update-on-3rd-party-attestation?spredfast-trk-id=sf204602974

Command Line Alias Attacks against Windows

Seeing the below tweet about, I wonder if anyone has done security testing against UEFI’s variables and shell aliases, similar to current attacks against the NT, the successor to OS/2, which also has console APIs (and variables).

Like Windows, UEFI also has command line shell alias command and API (part of the UEFI Shell protocol). UEFI was created back when the state-of-the-art of systems interfaces from Microsoft was OS/2 1.x, and one of the initial EFI developers was previously doing OS/2 1.x console API coding.

https://twitter.com/Hexacorn/status/1076257505829900289

https://github.com/tianocore/edk2/blob/master/ShellPkg/Library/UefiShellLevel3CommandsLib/Alias.c

https://en.wikipedia.org/wiki/Alias_(command)#cite_note-EFI-Shells-and-Scripting-3

https://github.com/tianocore/edk2/blob/master/MdePkg/Include/Protocol/Shell.h

http://h17007.www1.hpe.com/docs/iss/proliant_uefi/UEFI_Edgeline_103117/v28070872.html

ELVM/8cc: compile any C code into UEFI EBC binary

https://github.com/retrage/elvm/tree/retrage/ebc-v2

https://esolangs.org/wiki/Main_Page

coreboot 4.9 released

https://twitter.com/coreboot_org/status/1075809504556736512

coreboot 4.9 has been released. There are lots of changes, but the project does a great job summarizing the changes in their announcement:

[…]In the little more than 7 months since 4.8.1 we had 175 authors commit 2610 changes to master. The changes were, for the most part, all over the place, touching every part of the repository: chipsets, mainboards, tools, build system, documentation. In that time we also had 70 authors made their first commit to coreboot.[…]

Announcing coreboot 4.9

INTEL-SA-00131: Intel Power Management Controller (PMC) EoP

Power Management Controller (PMC) Security Advisory
Intel ID: INTEL-SA-00131
Advisory Category: Firmware
Impact of vulnerability: Escalation of Privilege, Information Disclosure
Severity rating: HIGH
Original release: 09/11/2018
Last revised: 12/18/2018

A potential security vulnerability in power management controller firmware may allow escalation of privilege and/ or information disclosure. Intel is releasing firmware updates to mitigate this potential vulnerability.

https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00131.html

 

Positive Technologies: Intel VISA: Through the Rabbit Hole

BlackHat Asia 2019 presentation:

The complexity of x86-based systems has become so great that not even specialists can know everything. The recently discovered Meltdown/Spectre vulnerabilities, as well as numerous issues in Intel Management Engine, underscore the platform’s mindboggling intricacies. So, the chips manufacturer has to actively use of various means for manufacturing verification and post-silicon debugging. We found that modern Platform Controller Hub (PCH) and CPU contain a full-fledged logic signal analyzer, which allows monitoring the state of internal lines and buses in real time—a gold mine for researchers. A vulnerability previously discovered by us, INTEL-SA-00086, enabled studying this technology, which is called Intel Visualization of Internal Signals Architecture (VISA). We believe it is used for manufacturing line verification of chips. With an enormous number of settings, VISA allows for the creating of custom rules for capturing and analyzing signals. VISA documentation is subject to an NDA and not available to ordinary users. However, we will show how, with the help of publicly available methods, one can access all the might of this technology WITHOUT ANY HARDWARE MODIFICATIONS on publicly available motherboards. With VISA, we succeeded in partially reconstructing the internal architecture of PCH and, within the chip, discovered dozens of devices that are invisible to the user yet are able to access certain critical data. In our talk, we will demonstrate how to read signals from PCH internal buses (for example, IOSF Primary and Side Band buses and Intel ME Front Side Bus) and other security-sensitive internal devices.

https://www.blackhat.com/asia-19/briefings/schedule/index.html#intel-visa-through-the-rabbit-hole-13513

OffensiveCon: Attacking Hardware Root of Trust from UEFI Firmware

Many hardware vendors armoring modern Secure Boot by moving Root of Trust to the hardware. It is definitely the right direction to create more difficulties for the attacker. But usually, between hardware and firmware exist many layers of code. Also, hardware vendors always fighting for boot performance which creates interesting security issues in actual implementations. In this presentation, I’ll explain new security issues to bypass specific implementation of Intel Boot Guard technology in one of the most common enterprise vendors. The actual vulnerability allows the attacker to bypass Intel Boot Guard security checks from OS without physical access to the hardware. Also, I’ll cover topics including Embedded Controller (EC) with focus on UEFI Firmware cooperation and Authenticated Code Module (ACM) runtime environment. It is brand new research not based on my previous Boot Guard discoveries.

https://www.offensivecon.org/speakers/2019/alex-matrosov.html

clang: Automatic variable initialization

Automatic variable initialization: Add an option to initialize automatic variables with either a pattern or with zeroes. The default is still that automatic variables are uninitialized. Also add attributes to request uninitialized on a per-variable basis, mainly to disable initialization of large stack arrays when deemed too expensive.[…]

https://reviews.llvm.org/rL349442

Wave Computing to open source MIPS ISA

Wave Computing®, the Silicon Valley company that is accelerating artificial intelligence (AI) from the edge to the data center, announced it will open source its MIPS instruction set architecture (ISA) to accelerate the ability for semiconductor companies, developers and universities to adopt and innovate using MIPS for next-generation system-on-chip (SoC) designs. Under the MIPS Open program, participants will have full access to the most recent versions of the 32-bit and 64-bit MIPS ISA free of charge – with no licensing or royalty fees. Additionally, participants in the MIPS Open program will be licensed under MIPS’ hundreds of existing worldwide patents.

https://wavecomp.ai/wave-computing-launches-the-mips-open-initiative