coreboot update

The coreboot project does regular blog posts on their project status, which is very nice. (By comparison, the UEFI Forum doesn’t do any such status updates of their Tianocore EDK-II codebase. Neither does the U-Boot project, AFAICT. For all 3, you can track their source tree, and for UEFI you can track their occasional spec updates. But coreboot’s status updates make it a lot easier to see what is happening with the project, without reading source deltas and sifting through threads of checkin emails.)

Last week, coreboot just released version 4.3. The current blog post mentions that version 4.4 is expected towards the end of April. In the last week, they had 30 authors — including 8 new authors! — with 131 commits. A brief excerpt from their blog post, on board support changes during last week:

“We had significant updates to a number of mainboards and the related chipsets in the past week as well. Intel had a large number of changes for their Braswell SoC and its reference board, Strago, merged this week. These included fixes for GPIOs, clocks, SD cards, and thermal support, as well as FSP integration updates. The Asus kgpe-d16 mainboard, along with the AMD Fam10h-Fam15h processor directory and the SB700 soutbridge had numerous patches to improve stability, fix IRQ routing and APIC identification, and improve ACPI. The winbond w83667hg-a was added to the coreboot codebase for the board as well. The Intel d510mo board had some improvements related to native graphics initialization, GPIOs and ACPI. The gigabyte ga-g41m-es2l and the Intel x4x northbridge code had some general cleanup and improvements to cbmem and memory initialization. We also saw the introduction of the initial framework for the new Intel Apollo Lake SoC. We’ll be seeing many more patches related to Apollo Lake in the coming weeks. Other changes of note included code to initialize the PS/2 aux port, a way to access memory address 0 without GCC “optimizing” it into a crash, and the addition of some documentation from Intel about developing new FSP based boards and chipsets. Finally, the Intel sklrvp Skylake reference board was dropped in favor of using the kunimitsu board.”

Full post:
http://blogs.coreboot.org/blog/2016/02/03/coreboot-changelog-jan-27-feb-2/

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