ARM System Validation process

Eoin McCann of ARM has a new blog post on the topic of system validation that gives an introduction to how ARM enables this for it’s partners.

System Validation at ARM: Enabling our Partners to Build Better Systems
[…] SoCs have evolved into complex entities that integrate several diverse units of intellectual property (IP). A modern SoC may include several components such as CPUs, GPU, interconnect, memory controller, System MMU, interrupt controller etc. The IPs themselves are complex units of design that are verified individually. Yet, despite rigorous IP-level verification, it is not possible to detect all bugs – especially those that are sensitized only when the IPs interact within a system. This article intends to give you some behind-the-scenes insight into the system validation work done at ARM to enable a wide range of applications for our IP. Many SoC design teams attempt to solve the verification problem individually using a mix of homegrown and commercially available tools and methods. The goal of system validation at ARM is to provide partners with high quality IP that have been verified to interoperate correctly. This provides a standardized foundation upon which partners are able to build their own system validation SOC solutions. Starting from a strong position, their design and verification efforts can be directed more at the design differentiation they add to the SoC and its interactions with the rest of the system. […]

Full blog post:
https://community.arm.com/groups/processors/blog/2016/04/05/system-validation-at-arm-enabling-our-partners-to-build-better-systems

PS: Re: the last few sentences in the above expert, I am still trying to find the ARM equivalent of Intel CHIPSEC. And/or waiting for Linaro to finish porting LUV (which includes CHIPSEC) to ARM (but hoping they’ll also target AArch32 not only AArch64, both targets need firmware security validation tools, not just the ones they’re banking the most on). ARM is more complex than current Intel CHIPSEC situation, each ARM IP licensee will need to write a handful of new ARM-flavored CHIPSEC security tests, to deal with the nuances of their system. Is there even an ARM security team, whose charter might include a CHIPSEC port?

 

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