CHIPSEC adds capsule parsing and blacklists ThinkPwn

CHIPSEC has had a few significant updates recently:

https://github.com/chipsec/chipsec/pull/73

https://github.com/chipsec/chipsec/pull/89

[…] It detects EFI binaries which have the following attributes:
1. GUID A56897A1-A77F-4600-84DB-22B0A801FA9A string of vulnerable UEFI SmmRuntime protocol within the contents of EFI binaries
2. Two names (UI strings) ‘SystemSmmRuntimeRt.efi’ and ‘SmmRuntime’ and two GUIDs 7C79AC8C-5E6C-4E3D-BA6F-C260EE7C172E and A56897A1-A77F-4600-84DB-22B0A801FA9A of vulnerable EFI binaries found in different systems[…]

 

FFRI on CHIPSEC

FFRI have done a presentation on CHIPSEC:

Monthly Research 2016.7: About security assessment framework “CHIPSEC”

Click to access MR201607_About_security_assessment_framework_CHIPSEC_ENG.pdf

http://www.ffri.jp/search_result/index.htm?q=CHIPSEC

http://www.ffri.jp/blog/2016/08/2016-08-09.htm

CHIPSEC ported to Apple Mac OS X!

Wow, CHIPSEC is ported to Mac OS X! This is great news for Mac owners! CHIPSEC requires a native kernel driver to support CHIPSEC’s HAL. Before this, there was only Linux and Windows HAL drivers for CHIPSEC, so Mac OS X users had to reboot with a Linux-based distro which had CHIPSEC (eg, LUV-live). Live use aside, this also probably means you’ll be able to use CHIPSEC on OS X for offline analysis of blobs.

OSX Driver for Chipsec. This driver is currently in alpha release. It is not signed and you will need to disable the System Integrity Protection to load it. It is only compatible with x86_64 kernels, that is any release >= 10.7. How to:
1. (optional) Build the Driver using Xcode (chipsec.xcodeproj)
2. Turn the System Integrity Protection off: see
    https://developer.apple.com/library/mac/documentation/Security/Conceptual/System_Integrity_Protection_Guide/ConfiguringSystemIntegrityProtection/ConfiguringSystemIntegrityProtection.html
3. Reboot and load the driver
   # kextutil chipsec.kext
4. Within the source/tool directory, run:
   # python chipsec_util.py spi info
   # python chipsec_util.py spi dump rom.bin
5. Unload the driver

https://github.com/chipsec/chipsec/blob/master/source/drivers/osx/README

https://github.com/chipsec/chipsec/pull/69

https://github.com/chipsec/chipsec/commit/b00c037101523212725c60d35f3f70b168a44e1c

With an OS X port of the CHIPSEC HAL, Apple’s OS is starting to catch up with Linux and Windows. I hope Apple paid @tweksteen for the effort, Apple should have done this port long ago. FreeBSD/OpenBSD/NetBSD: time for you to catch up too! 🙂

CHIPSEC adds blacklist database of UEFI modules

CHIPSEC 1.2.4 was recently released:

CHIPSEC 1.2.4 released

One new feature is a blacklist database of bad UEFI modules, and a new CHIPSEC security module to test for them, see the modules/tools/uefi/blacklist.py source for more details.

https://github.com/chipsec/chipsec/commit/bb9c9963547aae91a416be695c7f8b97fa61a3e8

Look at some of Yuriy’s more recent Twitter posts for a few new features not listed in the previous 1.2.4 release blog post, in addition to this blacklist.

CHIPSEC 1.2.4 released

Chipsec 1.2.4 has been released! There are no release notes, the docs haven’t been updated in the last 6 months, so you have to read the code for any new changes, besides these 3 tweets:

https://github.com/chipsec/chipsec

https://github.com/chipsec/chipsec/commits/master

 

Google fork of CHIPSEC

[[UPDATE: this tweet from answers my below question:

]]

GRR (Google Rapid Response), a remote live forensics for incident response, has forked CHIPSEC and updated it to work with GRR. I wonder if the CHIPSEC team will fold back these changes into the trunk version of CHIPSEC?

https://testpypi.python.org/pypi/grr-chipsec/1.2.3

https://github.com/google/grr

CHIPSEC 1.2.3 released!

Excerpt of CHIPSEC 1.2.3 release notes:

New/updated modules:
* tools.vmm.vbox_crash_apicbase — test for CVE-2015-0377
* udated common.bios_ts, common.uefi.s3bootscript, remap
* added template config file smm_config.ini for tools.smm.smm_ptr SMI fuzzer
* added template config file te.cfg for tools.secureboot.te tool

New/improved functionality:
* Added basic TPM access and TPM 1.2 support
        hal/tpm.py and hal/tpm12_commands.py HAL components
* Added basic Embedded Controller (EC) support
        hal/ec.py HAL component and chipsec_util ec util
* Added processing of x86 paging hierarchy
        hal/paging.py and hal/cpu.py HAL components and chipsec_util cpu pt util
* Added processing of Second Level Address Translation paging hierarchy (EPT)
        hal/vmm.py HAL component and chipsec_util vmm pt util
* Added processing of IOMMU (VT-d) paging hierarchy
        hal/iommu.py HAL component and chipsec_util iommu pt util
* Basic support for hypervisor hypercall interfaces
        hal/vmm.py HAL component and chipsec_util vmm hypercall util
* Added message bus interface for Atom SoC (Linux)
        hal/msgbus.py HAL component and chipsec_util msgbus util
* CPUID functionality moved from hal/cpuid.py to hal/cpu.py HAL component
        Use chipsec_util cpu cpuid util
* Added parsing of RAW images in UEFI firmware volumes
* Updated smbus and SPD HAL components to use XML config
* Added qrk.xml configuration file for Quark CPUs, updated configuration for Haswell Server (hsx.xml)
* Fixed location of MMCFG in server platforms. Results from prior versions may need to be recollected on server platforms.

See full release notes for list of bugfixes.

https://github.com/chipsec/chipsec

CHIPSEC updates

The CHIPSEC team have tweeted about an upcoming 1.2.3 release with more Xen, Hyper-V, IOMMU, EPT support.

Also, Yuriy Bulygin of the Intel CHIPSEC team has posted some videos of their REcon training showing CHIPSEC usage:

https://github.com/chipsec/chipsec
It looks like their last checkin to the public git repo was in April:
https://github.com/chipsec/chipsec/commits/master

DarkReading article on firmware protection

Yuriy and John of the Intel CHIPSEC team are quoted in a new Dark Reading article on firmware security.

[…] Yuriy Bulygin and John Loucaides, security researchers at Intel Security, point out that hackers attack firmware because they know many security and IT managers aren’t paying attention to it. They say security teams are so overwhelmed by the prevailing threat landscape, that they have their hands full just deploying the basics, like firewalls, intrusion prevention systems and sandboxes. […]

http://www.darkreading.com/iot/5-tips-for-protecting-firmware-from-attacks/d/d-id/1325604

Intel ATR site updates it’s research on web site

Intel Advanced Threat Research (ATR) is home of the CHIPSEC team. They just updated their web site with more presentation archives.

http://www.intelsecurity.com/advanced-threat-research/index.html

new CHIPSEC changes

As I understand things, Intel has a private source tree for CHIPSEC, and makes snapshots of [a subset of] this private tree to their public github.com-hosted source tree. As a result, CHIPSEC usually doesn’t release incrementally, updates usually come in big batches. So it is a surprise to see some recent incremental changes to the CHIPSEC public code tree. Here are some commits between mid-March and today:

Merge pull request #26 from tweksteen/cmos_test_reviewed
Merge pull request #25 from tweksteen/spi_test_reviewed
Merge pull request #27 from tweksteen/x1_carbon_test_reviewed
Merge pull request #23 from tweksteen/fix_i386_linux_driver
Remove unused setUp and tearDown
Add hardware test for X1 Carbon
Add test for CMOS dump
Add test for SPI info
Merge pull request #24 from tweksteen/raise_oshelper
Merge pull request #22 from tweksteen/sort_acpi_tables
Change sys.exit to re-raise
Sort ACPI tables by name
Fix Linux driver build on i386
Merged changes from #17 pull request
removed win specific cleanup script
Merge pull request #21 from chipsec/dev
Merge pull request #11 from tweksteen/setup
Merge pull request #14 from tweksteen/uefi_clean_up
Fix ACPI RSDP resolution based on EBDA
Add tests for ACPI RSDP, RSDT and XSDT.
Add basic tests
Fix Linux helper close
Do not force kernel module loading on Linux
Use metaclass to autoload helpers

https://github.com/chipsec/chipsec
https://github.com/chipsec/chipsec/commits/master

CHIPSEC training at REcon

The Intel CHIPSEC team doesn’t give training often, so when they do, it is worth mentioning.

Like last year, CHIPSEC will be offering training at REcon!

A variety of attacks targeting system firmware have been discussed publicly, drawing attention to the pre-boot and firmware components of the platform such as BIOS and SMM, OS loaders and secure booting. This training will detail and organize objectives, attack vectors, vulnerabilities and exploits against various types of system firmware such as legacy BIOS, SMI handlers and UEFI based firmware, mitigations as well as tools and methods available to analyze security of such firmware components. It will also detail protections available in hardware and in firmware such as Secure Boot implemented by modern operating systems against bootkits. The training includes theoretical material describing a structured approach to system firmware security analysis and mitigations as well as many hands-on exercises to test system firmware for vulnerabilities. After the training you should have basic understanding of platform hardware components and various types of system firmware, security objectives and attacks against system firmware, mitigations available in hardware and firmware. You should be able to apply this knowledge in practice to identify vulnerabilities in BIOS and perform forensic analysis of the firmware.

https://recon.cx/2016/training/trainingfirmware.html

CHIPSEC training at TROOPERS

The Intel CHIPSEC team doesn’t get out much to give training to the public often, so this upcoming 2-day of CHIPSEC training at TROOPERS is nice!

Security below the OS with CHIPSEC framework
Oleksandr Bazhaniuk, Yuriy Bulygin

A variety of attacks targeting platform firmware have been discussed publicly, drawing attention to the pre-boot and firmware components of the platform such as BIOS and SMM, UEFI secure boot and OS loaders. This workshop provides a hands-on opportunity to learn how to use an open source CHIPSEC framework https://github.com/chipsec/chipsec to test systems for vulnerabilities in low-level platform firmware components, problems with firmware security protections as well as develop your own modules in CHIPSEC which test for known issues or implement tools identifying new issues. Agenda:

* Introduction to platform hardware and access with CHIPSEC
* Introduction to platform firmware such as BIOS, UEFI firmware, SMI handlers
* Overview of main components of CHIPSEC framework
* Analyzing main firmware components and configuration
* Assessing systems for vulnerabilities in the BIOS and other firmware
* Developing vulnerability testing modules
* Developing fuzzers for firmware interfaces and other security tools
* BIOS forensics with CHIPSEC

https://www.troopers.de/events/troopers16/567_security_below_the_os_with_chipsec_framework/

LUV/BITS/CHIPSEC ported from x64 to x86!!

Get ready to test your Intel x86 systems!

Megha Dey of Intel submitted an 8-part patch to LUV that enables it to build on x86.

LUV has been useful for 64-bit x64 systems, and now is getting useful for 32-bit x86 systems!

Including 32-bit versions of BITS and CHIPSEC!

Is this the first time that pre-compiled binaries of CHIPSEC for x86 systems have been available? Not sure. Anyway, if you build from source you can start now, otherwise, look for the LUV-live binary download site to start having 32- and 64-bit versions, hopefully

Excerpt from part 0 of the patch:

[PATCH 0/8] Build and run LUV on 32 bit platforms

Currently LUV can be built only for 64 bit target platforms. This patchset contains patches which make sure that LUV can be compiled and run on both 32 as well as 64 bit target platforms. This required reworking of the PE header checks, adding call wrappers used by the shim bootloader to store and restore context, making sure chainloader.c compiled for 32 bit systems, adding support to ensure correct direct directory structure for 32 bit case and removing bugs in chipsec so that it could build without any erros on 32 bit systems. Also, the bits recipe is updated to build the grub EFI image only for target builds.This patchset addresses the following issue:
https://github.com/01org/luv-yocto/issues/57

grub: chainloader: shim: rework PE header checks
grub: shim: Add call wrappers for 32 bit systems
grub: shim: compile chainloader.c for 32bit system
luv : Correct directory structure for 32 bit case
luv: Add the ARCH parameter to chipsec Makefile
luv: chipsec : compile for 32 bit systems
bits: only build grub EFI image for target builds
bits: grub: specify location of images and modules for mkimage

More information:

https://lists.01.org/mailman/listinfo/luv

REcon2015 CHIPSEC video online

Video of the Intel CHIPSEC team from 2015’s REcon is now online.

Intel ATR posts RECon and CSW presentations

Recon 2015 presentation on firmware security available

 

Using UEFI_boot_script_expl on Lenovos

Dmytro “Cr4sh” Oleksiuk has a conversation on Twitter about using using his CHIPSEC-based exploit module against Lenovo models, noting some firmware vulnerabilities in Lenovo x220/x230 laptops.

Here are 5 tweets, let’s see how the non-deterministic WordPress.com rendering software will show them:
https://twitter.com/d_olex/status/6916255973326315
https://twitter.com/d_olex/status/69162603603585024252

It is nice to hear “The most recent ones looks not vulnerable.” Maybe the Lenovo QA team is improving? 🙂 Looking forward to more research on this, more than just a few Tweets, his research is usually very verbose! Also, he has updated the readme on his update script today:

https://github.com/Cr4sh/UEFI_boot_script_expl

Intel Security white paper on hardware/firmware threat predictions

McAfee Labs
2016 Threats Predictions
Intel Security: A five-year look ahead
http://www.mcafee.com/us/mcafee-labs.aspx

Twenty-one thought leaders from Intel Security collaborated to produce this look ahead at how the cybersecurity marketplace and actors are likely to evolve. […]

There are two sections in the document that focus on hardware/fimware security, search for the “Security on Silicon” and “Hardware” sections. A few brief experts:

We currently see only miniscule amounts of malware that target hardware or firmware vulnerabilities, but that is going to change during the next five years. We expect to see many groups leveraging newly discovered techniques, sharing what they know as they try to build effective attacks. Much of this will trickle down, from advanced nation-state intelligence and defense agencies, through big organized crime syndicates, and into broader use. Hardware and firmware protections such as secure boot, trusted execution environments, tamper protection, cryptographic acceleration, active memory protection, and immutable device identity make it more difficult for these attacks to gain a foothold, as well as easier to detect and correct them.

System firmware-based attacks pose a critical risk when coupled with the cloud or with cloud service providers. In 2015, the Intel ATR team demonstrated how to gain access to adjacent virtual machines through multiple vectors, including firmware rootkits or simple misconfigurations. Threats similar to the S3 Boot Script attack can be adapted for in-the-wild attacks. In many cases, it is just a matter of exploiting simple misconfigurations in UEFI or BIOS.

Going forward, we must be hyperaware of the system components below the operation system and how those components can be exploited or leveraged for attack. Available controls for under the operating system attacks include tools like CHIPSEC, and technologies like Intel’s Kernel Guard Technology (iKGT) and Intel BIOS Guard.

I wish that last paragraph mentioned ITL’s Stateless Laptop as one of the solutions.

Hmm, Why are there only BIOS and UEFI attacks mentioned? Where are the coreboot and U-Boot attacks? Are all listed firmware attacks against legacy BIOS systems and UEFI systems, not coreboot or U-Boot attacks? Intel spends resources on both UEFI as well as coreboot, so it seems strange to only see UEFI mentioned in their security. U-Boot also supports Intel these days, apparently without Intel’s involvement. So I’d hope to see a bit of coverage of both coreboot and prehaps a bit of U-Boot.

Is this because firmware attacks are being focused on Windows systems, not Chrome systems, due to marketshare numbers or expertise of attackers/researchers? I recall seeing some news recently claiming that Chrome PCs now outnumber Windows PCs.

Maybe because CHIPSEC only only targets Intel x86/x64 BIOS/UEFI systems, not coreboot/U-Boot systems, or ChromeOS systems, or ARM/AMD/MIPS/Itanium/other architectures, and if CHIPSEC is the only modern firmware vulnerability analysis tool, then lack of tools keeps these other systems’ security profiles dark? Why is AMD not porting CHIPSEC to AMD64, as well as the other handful of x86-compatible vendors?

Why is ARM not porting CHIPSEC to AArch32, only AArch64, and what is status of port, it was mentioned months ago but no status on final port. Once CHIPSEC’s C/asm/Perl userland and C/asm kernel HAL are ported to new arch, and Intel-centric stuff is ifdef’ed out, CHIPSEC still needs new chip-centric security tests added, and I don’t see anyone from ARM/Linaro doing this, so their port will be a gutted empty CHISPEC, not useful without new tests. Where is the ARM report mentioning the lack of CHIPSEC is a huge issue to enterprises ability to protect ARM systems?

Maybe ChromeOS + coreboot’s Verified Boot results in more secure systems than UEFI? Windows systems are UEFI and optional closed-source IBV-based BIOS, if Legacy Mode present. Chrome systems are coreboot and open-source SeaBIOS-based BIOS.

I’m glad Intel provides this kind of white papers. I wish AMD and ARM and other architecture vendors would also offer similar reports. I really wish there was some research on this from a neutral vendor, not a not a chip vendor, so we could see balanced coverage of Intel, AMD, ARM, OpenPOWER, and other systems, and their firmware, covered, including peripheral security (PCIe, NVMe, Thunderbolt, USB, etc. Doesn’t NIST have a hardware/firmware group? I wish they generated a HW/FW periodic security report. It could have the perspective to scope discussion to include trusting closed-source blobs, resident -vs- nonresident firmware solutions and their attack vectors, comparison’s of silicon and firmware (eg, Verified -vs- Secure boot) solutions, and most importantly not just solutions from a single vendor.